To provide a digital signal transmitting/receiving system which has a small-scale circuit constitution and can surely transmit and receive the asynchronous data.

In a digital signal transmitting/receiving system where the data signal WDT sent from a device 10 of the transmitting side is latched by the read clock signal of a device 20 of the receiving side, the phase of a write clock WCK that is sent from the device 10 to the device 20 is compared with the phases of 1st and 2nd read clocks RCK1 and RCK2 respectively. When the phase of the clock WCK is coincident with the phase of one of both clocks RCK1 and RCK2, a clock selection part 21 switches a read clock RCK to one of both clocks RCK1 and RCK2 that has its phase which is not coincident with the phase of the clock WCK.