To generate a qualified writing address when such data that one sector consists of plural frames, and an error correction block is constructed with plural sectors are gained, in the case that the relevant data are stored in an error correction processing memory.

This device is constituted so that when a detection frame number really detected by a synchronous pattern/frame number conversion part 16 does not coincide with a predicted frame number predicted by a frame number counter 15, and when both numbers become a specified relation on the boundary of a certain judgement reference value, when a count value of a sector number counter 20 is revised, and further, correction sensitivity is controlled by integrating a level of an AFC value also into a judgement element, and an offset is imparted to the judgement reference value.