Title:
ダイオード回路及び電子機器
Document Type and Number:
Japanese Patent JP4068431
Kind Code:
B2
Abstract:
A reduced power consumption diode circuit has a first voltage comparator that compares a voltage at a cathode terminal with a first sum of a voltage at an anode terminal and a voltage across a second voltage source, and outputs a reset signal. A second voltage comparator compares the voltage at the anode terminal with a second sum of the voltage at the cathode terminal and a voltage across the first voltage source, and outputs a set signal. A first latch circuit outputs a low level signal when the reset signal is input and a high level signal when the set signal is input. A diode has an anode connected to the anode terminal and a cathode connected to the cathode terminal, and an n-channel MOS transistor turns off in response to the low level signal and turns on in response to the high level signal.
Inventors:
Takao Nakashita
Application Number:
JP2002320247A
Publication Date:
March 26, 2008
Filing Date:
November 01, 2002
Export Citation:
Assignee:
Seiko Instruments Inc.
International Classes:
H02J7/06; H03K17/30; H03K17/06
Domestic Patent References:
| JP1155413A | ||||
| JP7297699A | ||||
| JP2003533118A | ||||
| JP9289738A | ||||
| JP11146640A |
Foreign References:
| WO2001086811A1 |
Attorney, Agent or Firm:
Yoshiharu Matsushita