PURPOSE: To improve the access speed of display data and to reduce the area on a printed circuit board by making an address register and a display data buffer independent and allowing CPU and a crystal control circuit to be one chip.
CONSTITUTION: When CPU 1 generates display data to be displayed on a crystal screen, it recognizes that a status register 7 is not busy, then, a video RAM address is written in the address register 2 and display data is written in the display data buffer 6. In such a case, the register 2 and the buffer 6 independently access without through an input output buffer, and CPU 1 and the crystal control circuit are provided on the same chip. When the address of a video RAM 8 into which CPU 1 writes display data is changed at every display data, the access speed can be doubled at maximum, and the occupancy area of CPU 1 and the crystal control circuit on the printed circuit board can be reduced to about 50%.
JPH06139008 | COORDINATE INPUT DEVICE |
JPH0863318 | TREND GRAPH DISPLAY DEVICE |