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Title:
DISPLAY CONTROLLER
Document Type and Number:
Japanese Patent JPH05108038
Kind Code:
A
Abstract:

PURPOSE: To reduce spurious radiation caused by a dot clock which drives a parallel-serial conversion part the display controller which converts parallel display data into serial, display data and sends the data to a display device.

CONSTITUTION: A clock stop circuit 17 decides display data sent from display data memories 11 and 12 to the parallel-serial conversion part 16 and when the data are of all-0 or all-1 constitution, it is decided that the data need not be converted, thereby stopping the operation clock to the parallel-serial conversion part. The operation clock is stopped for gaps between characters, a solid display part, and a part where there is no data change, not to mention the non-display period of characters, figures, so that the spurious radiation caused by the dot clock can be expected to greatly be reduced.


Inventors:
MATSUSHITA MASAKAZU
HINO NORIAKI
Application Number:
JP26594591A
Publication Date:
April 30, 1993
Filing Date:
October 15, 1991
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F3/147; G09G5/00; G09G5/18; G09G5/40; (IPC1-7): G06F3/147; G09G5/00; G09G5/18; G09G5/40
Attorney, Agent or Firm:
Ogawa Katsuo



 
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