PURPOSE: To increase the overall writing speed for the display system featuring a lower writing speed to the display unit than the transfer speed to the memory by setting up the flag at the rewriting bit memory only when the rewriting is required to control the rewriting.

CONSTITUTION: The data given from CPU is memorized temporarily in register 11 and then sent to high-speed memory RAM13 based on the address of address counter 12. The data is then compared at comparator 15 with the contents of the address. And if an agreement is obtained, no rewriting is required for the contents of RAM13. While in case no agreement is obtained, flag 1 is set up at the corresponding bit of rewriting bit memory 14 via the disagreement signal to control counter 12 and RAM control circuit 12. Thus the data is rewritten for the address of RAM13. Then the data of the address where the flag is set up is sent via counter 12 to writing control circuit 18 of AC-type plasma display unit PDP. Thus, a low- speed writing is given to PDP. In such way, the writing data quantity is reduced to increase the overall writing speed.