分散深層学習システム - Nippon Telegraph and Telephone Corporation

Title:

分散深層学習システム

Document Type and Number:

Japanese Patent JP7248110

Kind Code:

B2

Abstract:

A computing interconnect apparatus includes a reception unit configured to receive a packet transmitted from each of learning nodes and acquire a value of a gradient stored in the packet, an adder configured to calculate a sum of the gradient acquired by the reception unit in parallel separately for each of processing units in accordance with the number of the processing units to be carried out being determined by bit precision of the gradient and a desired processing speed, and a transmission unit configured to write calculation results of the sum of the gradient separate for each of the processing units being obtained by the adder into packetization and transmit the calculation results to each of the learning nodes.

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Inventors:

Yuki Arikawa
Kenji Kawai
Junichi Kato
Go Fiku
Takeshi Ito
Akiji Tanaka
Ken Sakamoto

Application Number:

JP2021522582A

Publication Date:

March 29, 2023

Filing Date:

May 31, 2019

Export Citation:

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Assignee:

Nippon Telegraph and Telephone Corporation

International Classes:

G06N3/098

Domestic Patent References:

JP2018036779A

Other References:

DEAN, Jeffrey et al.,Large Scale Distributed Deep Networks,NIPS 2012,2012年,pp. 1-9,[2019年6月19日検索],インターネット

Attorney, Agent or Firm:

Shigeki Yamakawa
Yuzo Koike
Masaki Yamakawa
Motoyama Yasushi

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