PURPOSE: To improve the arithmetic performance of a dividing device by using the output of a flag table which is retrieved simultaneously with a reciprocal table to decide the number of times of the repetitive arithmetic operation in response to the error of the approximate value of a reciprocal.

CONSTITUTION: A flag table 3 outputs a flag to show that the quotient having the desired accuracy is obtained with the repetitive arithmetic operations of the specified frequency in response to the error of the approximate value of a reciprocal. A divider 2 has the input of a dividend and a divisor and uses a part of the binary normalized divisor as an address to retrieve a reciprocal table 1. Then the obtained output of the table 1 is corrected by an amount equal to the value obtained by binary normalizing the divisor. Thus the primary approximate value of the reciprocal of the divisor is obtained. Simultaneously the table 3 is retrieved with the same value as the address with which the table 1 is retrieved. A frequency control circuit 4 decides by the output of the table 3 whether the repetitive arithmetic operations should be carried out by the conventional frequency or the specified frequency decided previously and outputs the result of this decision to the divider 2. In such a way, the undesired repetitive arithmetic operations can be avoided.