Title:
DMA SYSTEM FOR ELECTRONIC COMPUTER
Document Type and Number:
Japanese Patent JPS5533268
Kind Code:
A
Abstract:
PURPOSE: To increase a processing speed by disconnecting CPU from DMA operation until the DMA operation ends, by giving indication relating the DMA operation at an operation start.
CONSTITUTION: To transfer data between shared RAM 12 and drum 17, CPU 11 sends commands TRACK NO, SECTOR NO and READ/WRITE of drum 17 to the magnetic drum 17 via DCU 14. On receiving a START ADDRESS signal, etc., DMA unit 13 start DMA transfer. Once the DMA transfer is started, shared, RAM 12 and DMA unit 13 are connected together. When fixed transfer is done between shared RAM 12 and magnetic drum 17, DMA 13 connects shared RAM 12 to CPU bus 18 and sends a STATUS signal of READY back to CPU 11 via DCU 14, thereby finishing the DMA operation.
Inventors:
EBIHARA SHIGERU
NAGASHIMA KIYOSHI
NAGASHIMA KIYOSHI
Application Number:
JP10640578A
Publication Date:
March 08, 1980
Filing Date:
August 31, 1978
Export Citation:
Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06F13/28; G06F3/00; G06F13/00; (IPC1-7): G06F3/00; G06F13/00; G11D1/00