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Title:
DOUBLE TERMINAL NEGATIVE RESISTANCE ELEMENT
Document Type and Number:
Japanese Patent JPS59204289
Kind Code:
A
Abstract:
PURPOSE:To enable to realize a microwave oscillator of a high efficiency with a simple structure at a low cost by a method wherein a fixed impedance to microwaves and direct current is connected between the source of an FET and a terminal electrode. CONSTITUTION:The gate G of the FET is connected to the first terminal electrode of a diode package, and the drain D to the second terminal electrode. The impedance Zs satisfying the fomula ¦Zs¦>¦Ri+1/omegaCgs¦ to microwaves and the formula Zs=Rs=¦Vgs/IS¦ in DC manner is connected between the source and the first terminal electrode. Then, a negative bias voltage is impressed on the first terminal electrode, and a positive one on the second terminal electrode. Where, Ri; represents channel resistance, omega; the angular frequency of microwave, Cgs; gate input capacitance, Rs; bias resitance, Vgs; gate-source volage, Is; source current.

Inventors:
TORITSUKA HIDEKI
Application Number:
JP7934983A
Publication Date:
November 19, 1984
Filing Date:
May 09, 1983
Export Citation:
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Assignee:
TOSHIBA KK
International Classes:
H01L47/00; H03B7/14; H03B9/12; (IPC1-7): H01L47/00; H03B7/14
Domestic Patent References:
JPS5244185A1977-04-06
JPS5258381A1977-05-13
JPS4881461A1973-10-31
JPS4984770A1974-08-14
JPS5383558A1978-07-24
JPS5673906A1981-06-19
JPS5748711B21982-10-18
JPS53108356A1978-09-21
JPS54105452A1979-08-18
Attorney, Agent or Firm:
Norio Ogo (1 outside)