To provide a drive circuit for a plasma address liquid crystal display device, in which discharge interval over a long period is realized by making the pulse applied time assigned to one electrode longer than a single horizontal interval.

In the circuit for driving a PALC structure liquid crystal display device in which electrodes 34 cover two plasma channels, the signals applied to the electrodes 34 consists of plural pulse trains and will not overlap in time with the pulse trains applied to an adjacent electrode, and the width of one pulse train is equal to or smaller than one horizontal interval.