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Patent Searching and Data


Title:
DRIVE CIRCUIT FOR POWER MOS FIELD EFFECT TRANSISTOR USING PULSE TRANSFORMER
Document Type and Number:
Japanese Patent JPS6221322
Kind Code:
A
Abstract:

PURPOSE: To attain high circuit integration by providing a means giving a positive voltage to a gate of a power MOSFET at the leading of a PWM signal, and a means applying a negative voltage to a pulse transformer enough to conduct a MOSFET at the trailing of the PWM signal thereby interrupting the power MOSFET.

CONSTITUTION: A voltage setting circuit 24 outputs a prescribed positive/ negative voltage preset according to high/low level of the PWM signal (d). A voltage comparator 28 compares a setting voltage (f) with a voltage Vp at the primary winding of the pulse transformer 221, and changes the output to a low level when the level of an input A is higher than that of an input B, and keeps the state until the input B is changed next. When the input B is changed and the input A reaches the lower level than the input B, the output is changed into H level and its state is held. Gate circuits 25, 26 having an input, an output and a control input outputs a low level independently of the input state when the control input reaches a high level, and when the control input is at a low level, the output is equal to the input. Thus, high circuit integration is attained.


Inventors:
OKADA JUNICHI
KAI TORU
Application Number:
JP16162785A
Publication Date:
January 29, 1987
Filing Date:
July 22, 1985
Export Citation:
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Assignee:
YASKAWA DENKI SEISAKUSHO KK
International Classes:
H03K17/04; H03K17/687; (IPC1-7): H03K17/04; H03K17/687
Attorney, Agent or Firm:
Kazuo Sato