Title:
DRIVING CIRCUIT
Document Type and Number:
Japanese Patent JP3203711
Kind Code:
B2
Abstract:
PURPOSE: To unnecessitate stabilizing resistance, and to reduce the value of output resistance by a method wherein the MOS transistor of a driving circuit is operated in the region of negative temperature coefficient, and a circuit, having a negative temperature coefficient and consisting of the MOS and a bipolar, is constituted on a bias circuit.
CONSTITUTION: An N-channel MOS transistor (NM) T1 and an NPN transistor (N) T3 and also a P-channel MOS transistor (PM) T2 and an NT4 are Darlington-connected, and they constitute a complementary emitter earthing circuit. A drain current becomes low when the temperature rises due to the scattering of lattice of the carrier, and when a sufficient drain current is allowed to flow, it has a negative temperature coefficient. When the NMT 1, PMT 2 and the NT 3, NT 4 are thermally coupled, the temperature of the NT 2 and NT 3 goes up, and also the temperature of the NMT 1 and the PMT 2 goes up. As a result, the drain current is lowered, the voltage of both ends of the resistor 1 is also lowered, and thermal runaway can be prevented.
Inventors:
Hiroaki Mikoshiba
Application Number:
JP29949391A
Publication Date:
August 27, 2001
Filing Date:
October 21, 1991
Export Citation:
Assignee:
NEC
International Classes:
H01L27/06; H01L21/8249; H03F1/30; H03F3/30; H03K17/14; (IPC1-7): H03K17/14; H01L21/8249; H01L27/06
Domestic Patent References:
| JP3136365A | ||||
| JP3226008A | ||||
| JP1125022A |
Attorney, Agent or Firm:
Johei Yamashita