PURPOSE: To obtain a dual port memory contention circuit which reduces the burden to software, which secures the recovery time of an EEPROM, and can use multiple processors which have any special instructions for support of multiple processors.

CONSTITUTION: A special register and a timer circuit which counts the recovery time of a memory circuit to report it to the special register are provided, and this special register can be read out of both of two processors, and its contents are set to a prescribed value at the time of read out of one processor and are reset to the original value to indicate permission/inhibition of access to the memory circuit after a prescribed time.