PURPOSE: To shorten time required for obtaining the state information of the data processor on the other side through a bus intersection circuit connecting the bus of the duplexed data processor.

CONSTITUTION: The electric power source disconnection information of a data processor 10 is directly written and stored in a register 28 of a data processor 20 on the other side by an electric power source disconnection detection circuit 27, and the internal state information is directly written and stored through a bus 15 by a central processing unit 11. A register 18 stores the electric power source disconnection information and the state information on the other side, and the central processing unit 11 executes the prescribed processing by directly reading the storage information of the register 18 through the bus 15 and recognizing the state on the other side. Thus, it is not necessary to provide the conventional bus intersection circuit and a means requiring the time for interrupt procedure when the duplex data processor acquires the state on the other side.