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Patent Searching and Data


Title:
DUTY CONTROL CIRCUIT
Document Type and Number:
Japanese Patent JPH02274012
Kind Code:
A
Abstract:

PURPOSE: To secure the correct duty by using a result of comparison of a voltage with a capacitor voltage (reference voltage) which is charged only in a period in which a ramp wave, and detection current of an electric conduction current (output current) of a transistor exceed a set current value, and discharging in other period.

CONSTITUTION: A reference voltage is a voltage which is driven by an output of an inverter and detects an electric conduction current (output current) of a transistor, charged only in a period (S2 period) in which its detection current exceeds a set current value, and discharge in other period. In such a state, when the potential of the capacitor is below the potential V1, the capacitor is charged quickly up to this potential, and when it exceeds V1, the capacitor is brought to ramp wave charge by an inclination determined in advance. Also, when a ramp wave reaches V3, the capacitor is discharged quickly to the potential V2, and from this potential, the ramp wave sets an operation for discharging until a logical level of an input signal comes to '1' by an inclination determined in advance to one period. In such a way, the correct duty is secured extending over the whole area of the frequency of the input signal.


Inventors:
NAKAO SATOSHI
NAKAMURA NORIHITO
Application Number:
JP9487289A
Publication Date:
November 08, 1990
Filing Date:
April 14, 1989
Export Citation:
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Assignee:
TOSHIBA CORP
International Classes:
H03K5/04; H03K17/64; (IPC1-7): H03K5/04; H03K17/64
Attorney, Agent or Firm:
Takehiko Suzue (3 outside)