PURPOSE: To reduce the load of a memory system power supply by including a means for activating sense amplifier groups at respectively different timing in a sense amplifier activating means only when a refresh instruction detecting signal is active.
CONSTITUTION: This dynamic type semiconductor storage device is provided with the inverse of, CAS before RAS detecting circuit 30 for generating a refresh instruction detecting signal REF, a sense amplifier activation signal generating circuit 4 for generating sense amplifier activation signals 0, 1 in response to an internal signal Int.RAS outputted from a control signal generating circuit 5 and a sense trigger generating circuit 20 for generating sense trigger signals s1 to s8 in response to the signals REF, 0, 1. Only when the signal REF is active and a refresh cycle is specified to the semiconductor storage device, the sense amplifier groups SA1 to SA8 are activated at respectively different timing. Consequently, refresh operation can be attained by a small peak current and the load of the system power supply can be reduced.
JPS6484496A | 1989-03-29 | |||
JPS63183693A | 1988-07-29 |