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Patent Searching and Data


Title:
EFFECTIVE ALARM DETECTION CIRCUIT
Document Type and Number:
Japanese Patent JPH06181462
Kind Code:
A
Abstract:

PURPOSE: To provide the effective alarm detection circuit solving a problem of a large sized equipment with respect to the effective alarm detection circuit provided to a repeater or a terminal station in a transmitter.

CONSTITUTION: The detection circuit is provided with a counter circuit (5) connecting to a relay panel having an alarm (ALM) detection section detecting a fault of a transmission line and raising a relevant alarm signal in plural bits and a format conversion section converting the alarm signal in plural bits into a serial signal string and counting a clock signal (CLK) generated synchronously with the serial signal string and outputting the count, a decode circuit (6) detecting it that the count value is a prescribed value and generating a latch signal, and an AND gate circuit (7) ANDing the latch signal and the serial signal string. A logic 'H' or 'L' of a signal in a prescribed order is detected by an output of the AND gate circuit (7).


Inventors:
HORIE AKIRA
Application Number:
JP35328092A
Publication Date:
June 28, 1994
Filing Date:
December 11, 1992
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04J3/14; (IPC1-7): H04J3/14
Attorney, Agent or Firm:
Hayashi Tsunori