PURPOSE: To convert data processed by a CPU into a high-speed serial signal by forming plural RAMs storing data temporally when the serial signal is outputted by using the CPU outside the CPU.

CONSTITUTION: The RAMs 1-1, 1-2 are formed on the outside of the CPU. The RAMs 1-1, 1-2 are brought to the WRITE state and READ state respectively as an initial status through a WRITE/READ signal generator 5. The writing operation in the RAM 1-1 is executed on the basis of an instruction from the CPU at first, and when the written data is to be read out, a terminal 11 is triggered and the RAMs 1-1, 1-2 are turned to the READ state and WRITE state respectively. At that time, a clock of 1,500 is inputted from a terminal 13 and converted into binary data by a clock counter 6 to obtain 1,500-bit serial data paralleled by 8 bits. Similar operation is executed also in the RAM 1-2 and serial data consisting of 8×1,500 bits is obtained. The repeat of said operation makes it possible to convert the data processed by the CPU to high-speed serial data.