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Title:
ELECTROSTATIC PROTECTOR FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Document Type and Number:
Japanese Patent JPH04161025
Kind Code:
A
Abstract:

PURPOSE: To reduce the number of the elements needed for an electrostatic protecting circuit by providing a bipolar transistor whose collector is connected to the first grounding terminal and whose emitter is connected to the second grounding terminal, and a means for applying a bias voltage to the base of the bipolar transistor.

CONSTITUTION: When an electrostatic surge positive to the potential of a ground terminal 1, this electrostatic surge is absorbed by the breakdown current between the collectors and emitters of bipolar transistors 3, 7. On this occasion, voltages appear between both terminals of resistors 5, 9 owing to the breakdown current between the collectors and emitters of the bipolar transistors 3, 7. Then, the paths between the emitters and bases of the bipolar transistors 3, 7 are brought into an on-state turning the bipolar transistors 3, 7 on. Accordingly, the electrostatic surge is drawn off quickly.


Inventors:
MIURA KEIJI
Application Number:
JP28636490A
Publication Date:
June 04, 1992
Filing Date:
October 24, 1990
Export Citation:
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Assignee:
NEC CORP
International Classes:
H02H9/04; H01L21/822; H01L27/04; H03K19/0175; (IPC1-7): H02H9/04
Attorney, Agent or Firm:
Masanori Fujimaki



 
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