Title:
ELEMENT ISOLATION STRUCTURE OF SIMOS SEMICONDUCTOR DEVICE AND ITS MANUFACTURE
Document Type and Number:
Japanese Patent JPH05152430
Kind Code:
A
Abstract:
PURPOSE: To perform a high-concentration channel stop injection without causing such problems as a narrow channel effect, an increase in the substrate-bias dependence of a threshold voltage, an increase in an junction leak and the like.
CONSTITUTION: A first oxide film is formed; after that, ions are implanted; a channel stopper 41 is formed. Since the channel stopper 41 does not reach an element region under polysilicon 10, a transistor characteristic is not affected.
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Inventors:
SHIBAHARA KENTARO
Application Number:
JP33633991A
Publication Date:
June 18, 1993
Filing Date:
November 26, 1991
Export Citation:
Assignee:
NEC CORP
International Classes:
H01L21/76; (IPC1-7): H01L21/76
Domestic Patent References:
| JPS61125087A | 1986-06-12 |
Attorney, Agent or Firm:
Sugano Naka