PURPOSE: To improve the reliability of a system by performing the self-diagnosis of a cache tag RAM with a hardware.

CONSTITUTION: When the power source of the system is turned on or the reset switch is pressed, an access start signal is outputted from a microprocessor 30 and when the first signal is detected by a detecting means 20, the microprocessor 30 interrupts processing just after the detection and turns to a hold state. Next, a cache RAM controller 40 performs the self-diagnosis of a memory check for a cache tag RAM 80 mounted outside the cache RAM controller 40 originally and stored cache tag address information and line status information originally by using a generating means 50 composed of the hardware. When any abnormality is not found out, the hold state of the microprocessor is canceled, and the system is continuously started. When the abnormality is found out, a cache sub system is disconnected from the system and operated.