Title:
EMULATOR SYSTEM
Document Type and Number:
Japanese Patent JP3565987
Kind Code:
B2
Abstract:
PROBLEM TO BE SOLVED: To enable break at the time of read execution of non-initialized macro parameter by discriminating whether write access information is stored or not at the read access time of an emulation program under executing.
SOLUTION: During the execution of the emulation program, an address comparator circuit 201 and a read/write signal comparator circuit 202 monitor a system bus 125 and when there is access to an address range set to the address comparator circuit 201, that information is transferred to a break discrimination circuit 205. When data are read into the address range of macro parameter in the memory area of a microcomputer 14a, under the control of an access information read/write circuit 204, data at the correspondent address of an access information memory 203 are read in. When these data do not exist, reading without initializing the macro parameter is judged by the break discrimination circuit 205, a break signal is sent out to a monitor circuit 120, and the program under executing is broken.
Inventors:
Masahiro Okano
Eisuke Shimomura
Eisuke Shimomura
Application Number:
JP13376596A
Publication Date:
September 15, 2004
Filing Date:
May 28, 1996
Export Citation:
Assignee:
Renesas Technology Corp.
Renesas Solutions Corporation
Renesas Solutions Corporation
International Classes:
G06F11/28; G06F11/22; G06F11/36; (IPC1-7): G06F11/22; G06F11/28
Domestic Patent References:
| JP7044406A |
Attorney, Agent or Firm:
Hiroaki Tazawa
Konobu Kato
Hideaki Tazawa
Hamada Hatsune
Konobu Kato
Hideaki Tazawa
Hamada Hatsune