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Title:
ENCODER CIRCUIT
Document Type and Number:
Japanese Patent JPH01208028
Kind Code:
A
Abstract:

PURPOSE: To reduce power consumption and to perform a fast operation by performing encoding by connecting a first transistor to input the inversion value of an input signal to a gate to a second transistor with the same conduction format to input the non-inversion value of the input signal on the other side in series.

CONSTITUTION: When a value to be outputted to each output line Lj (j:1∼3) is '1', a source voltage is connected to the source of a transistor(TR)Q1 out of pMOS transistors TRQ1 and Q2, and the output line Lj is connected to the drain of the TRQ2. And an inversion input signal Di (i=1∼7) is connected to the gate of the TR Q1, and the input signal Di+1 to the gate of the TRQ1. When the value to be outputted to the output line Lj is '0', the source of a TRQ4 out of nMOSTRs Q3 and Q4 connected in series is set at a ground level, and the drain of the TRQ3 is connected to the output line Lj. And the input signal Di is connected to the gate of the TRQ4, and the inversion input signal Di+1 to the gate of the TRQ3. Thus, it is possible to reduce the power consumption and to perform the fast operation in an encoder circuit.


Inventors:
MIKI TAKAHIRO
HOSOYA SHIRO
Application Number:
JP3323288A
Publication Date:
August 22, 1989
Filing Date:
February 15, 1988
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
H03M7/00; H03M1/36; H03M7/08; H03M7/20; (IPC1-7): H03M7/00
Attorney, Agent or Firm:
Kaneo Miyata (3 outside)



 
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