PURPOSE: To detect the completion of transmission of code data by shifting the contents of first and second shift registers, and comparing the contents of least significant bits of both shift registers.

CONSTITUTION: A main controller 1 shifts the contents of the first and second shift registers 7, 8 bit by bit to a low-order digit side at a prescribed timing, and stores information sent out from the least significant bit 7a of the first shift register 7 in a buffet for transmission, and also, compares the content of the least significant bit 7a of the first shift register 7 with that of the least significant bit 8a of the second shift register 8. The content of the least significant bit 7a of the first shift register 7 and that of the least significant bit 8a of the second shift register 8 coincide with each other when they show (0). Thereby, the main controller 1 judges that the transmission of the significant part of one piece of code data is completed.