Title:
スーパースカラマイクロプロセッサにおける分岐予測正確度向上のための装置および方法
Document Type and Number:
Japanese Patent JP3602542
Kind Code:
B2
Abstract:
A method for a prediction correlation between a first group of branch instructions in a bunch of instructions and a second group of branch instructions in a bunch of instructions is disclosed. The method includes indicating a direction of a plurality of branch instructions in a bunch of instructions. More particularly, the method includes building an address composed of an instruction fetch address and bits in a history register. The method accesses a bunch of instructions using the fetch address and accesses a prediction bits set from a branch history table using the composed address. The accessed bunch of instructions are processed. Further, the history register and the branch history table are updated to correlate a first group of a branch instructions in the accessed bunch of instructions to a second group of branch instructions in a next group of branch instructions in the bunch of instructions.
Inventors:
Kurkani, Patrice M
Reeve, Richard
Saxena, Nimal Earl.
Reeve, Richard
Saxena, Nimal Earl.
Application Number:
JP52944797A
Publication Date:
December 15, 2004
Filing Date:
February 10, 1997
Export Citation:
Assignee:
富士通株式会社
International Classes:
D06F39/14; D06F43/02; G06F9/38; (IPC1-7): G06F9/38
Domestic Patent References:
| JP628184A | ||||
| JP6236270A |
Attorney, Agent or Firm:
Takashi Ishida
Shigeru Tsuchiya
Toshio Toda
Masaya Nishiyama
Shigeru Tsuchiya
Toshio Toda
Masaya Nishiyama