PURPOSE: To execute the rapid data transmission by providing a means to select the constitution of plural error correcting codes at the coder and the decoder respectively and having the means to inform the decoder of the quality of the communicating line.

CONSTITUTION: When a selecting switch 5 is made into a mode 1, the address to output from an address generating circuit II of an input control part 1, an address generating circuit III of a coding processing part 2 and an address generating circuit VI of an output control part 3 which generate the higher order bit out of addresses from respective parts go to be effective, and the error correcting code is constituted on a buffer memory part 4. When the selecting switch 5 is made into a mode 2, address circuits II∼VI go to be reset, and the error correcting code is constituted on the memory part 4. Even in the decoder, a selecting switch 10 is made into the mode 1 or the mode 2, the error correcting code is constituted on a buffer memory part 9, and the decoding processing is executed. Thus, the error correcting code to match with the quality of the communicating line can be selected and the rapid data are transmitted.