PURPOSE: To obtain an error correcting system, which can correct the error efficiently even if the tracks, wherein error patterns are generated, are increased.

CONSTITUTION: Counters 10, which controls the timing of resetting the memory circuit in an error-pattern generating circuit 8, request the number of the error occurrences to the memory circuit in the error-pattern generating circuit 8. The number of the error occurrences and the previous reset interval stored in the counter 10 set the new reset interval in the counter 10 with a reset-count- value generating circuit 9. Thus, the memory circuit in the error-pattern generating circuit 8 is reset. When an erroneous-track indicating circuit 4 reduces the number of the known erroneous tracks, the track, wherein the error has occurred even only once, can be reduced and the stabilized error correction is performed.