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Title:
ERROR CORRECTION CODE-CODING METHOD, ERROR CORRECTION CODE-DECODING METHOD, ERROR CORRECTION CODE-CODING APPARATUS, ERROR CORRECTION CODE-DECODING APPARATUS, DIGITAL SIGNAL-CODING METHOD, DIGITAL SIGNAL-DECODING METHOD, DIGITAL SIGNAL-CODING APPARATUS, DIGITAL SIGNAL-DECODING APPARATUS AND RECORDING MEDIUM
Document Type and Number:
Japanese Patent JPH07211014
Kind Code:
A
Abstract:

PURPOSE: To enhance a coding efficiency and improve an error correction efficiency while sharing part of a recording system circuit and a reproducing system circuit of a conventional coding method, by extending code lengths of C1 and C2 codes.

CONSTITUTION: A coding circuit for coding an error correction code of the apparatus adds C2 and C1 parities of 12 bytes to the actual data of 104 bytes, thereby outputting a C1 code of a data length of 128 bytes. The C1 code is divided every 32 bytes into four frames. The number of bytes of one frame becomes equal to that in a present CD format. A sub code of one byte and a frame synchronous signal are added to each of the four frames, which is a C1 code of an error correction code. 20 C1 codes are collected to form one sector (of 80 frames). In this manner, while a frame length is maintained the same as the CD standard, code lengths of C1 and C2 codes are extended in comparison with the code length of the CD standard, so that a coding efficiency and an error correction efficiency are improved.


Inventors:
YONEMITSU JUN
SHIMIZU YOSHINORI
Application Number:
JP1593894A
Publication Date:
August 11, 1995
Filing Date:
January 14, 1994
Export Citation:
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Assignee:
SONY CORP
International Classes:
G11B20/12; G11B20/18; (IPC1-7): G11B20/18; G11B20/12; G11B20/18
Attorney, Agent or Firm:
Kei Tanabe