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Patent Searching and Data


Title:
ERROR CORRECTION MECHANISM FOR REDUNDANT MEMORY
Document Type and Number:
Japanese Patent JPH1049448
Kind Code:
A
Abstract:

To realize a redundant memory of higher reliability by preventing the development to an unrecoverable error due to the accumulation of soft errors of a memory.

If a correctable error is detected while a memory 2 is read, a correction address/data buffer 6 holds the relevant address and data. The memory data on the address stored in the buffer 6 may possibly be developed into an uncorrectable error as long as the memory error is not corrected. Thereafter, if an uncorrectable error is detected out of the memory 2 in its read mode, it's checked whether the data that caused the uncorrectable error are stored in the buffer 6. If such data are stored in the buffer 6, the data are replied from the buffer 6. Thus, even the uncorrectable error can be recovered.


Inventors:
WATABE SHINJI
Application Number:
JP20699996A
Publication Date:
February 20, 1998
Filing Date:
August 06, 1996
Export Citation:
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Assignee:
NEC CORP
International Classes:
G06F12/16; (IPC1-7): G06F12/16
Attorney, Agent or Firm:
Yosuke Goto (2 outside)