To fast detect and correct errors by detecting the error of a line that undergone the second correction of error after the second correction of error of another line set in the 1st direction and simultaneously with the second correction of error of the next line.

The 1st error correction is carried out in a certain error correction block by an ECC(error correction code) circuit 5 in the direction of an inside code parity PI. In other words, the errors of information symbols are successively corrected by the parity PI on every line in the PI direction. After these errors are corrected, the error correction is carried out by the circuit 5 in the direction of an outside code parity PO. After the error correction is over in the PO direction, the second error correction is carried out by the circuit 5 in the Pi direction. An EDC(error detection code) circuit 6 detects the errors in the PI direction in parallel to the 2nd error correction of the PI direction. That is, the errors of information symbols are successively checked on every line in the PI direction.