PURPOSE: To correct an error without re-transmission of a data by setting a check bit to logic '1' when two adjacent bits intersecting orthogonally with a check direction are logic '1' with respect to the check bit.

CONSTITUTION: When a check bit is set to logic '1', vertical bits are checked and when both bits are logic '0', it is discriminated that the checked bit being logic '1' is in error and the checked bit is corrected to be logic '0'. When the checked bit is logic '0' and the vertical bits are logic '1', it is decided that the checked bit being logic '0' is in error and the checked bit is corrected to be logic '1'. That is, the characteristic that a drawing data is consecutive is utilized and an error is found out from preceding and succeeding data and the error is corrected. Thus, the re-transmission of data is not required and even existing data whose error is overlooked in the preceding error check are corrected again.