PURPOSE: To reduce the correction processing time by providing a syndrome register storing syndromes in row/column directions and correcting the syndrome of one series when the error symbol is corrected in the other series.

CONSTITUTION: Data from an input terminal 20 is subject to error correction processing in the row direction (C1 series) by a C1 demodulator 11 and stored in a C1 syndrome register 13. Then the error correction processing in the column direction (C2 series) is implemented by a C2 demodulator 12 and the result is stored in a C2 syndrome register 14. In this case, the register 13 is updated by a C1 syndrome update circuit 21 in response to the symbol subject to error correction. When the error correction is applied in the C1 series, the register 14 is updated by a C2 syndrome update circuit 22. When the content of the register 13 is all '0' and if the content of the register 14 is all '0', the correction is finished. Thus, it is not required to read all the series data after the correction of the error symbol and the correction processing time is reduced.