PURPOSE: To reduce an error processing at a high-order device and to lighten a load by stopping the output of a phase synchronizing loop generating circuit PLO error generated when an unstationary condition exists after a motor is activated and outputting a latched PLO error.

CONSTITUTION: A rise latch circuit 1 detects and stores the change of a PLO signal, and by a fall detecting circuit 4, the change of the PLO signal and the signal of the circuit 1 is detected. A fall latch circuit 5 stores the change of the signal of the circuit 4, and the level of the PLO signal is detected by a level detecting circuit 3. Further, from the signal of the circuit 5 and the signal of the circuit 3, an error detecting circuit 6 detects and outputs the error condition of the PLO. When a reset circuit 2 is transmitted from the high order device, the signal of the circuit 5 is changed by a reset signal and the PLO signal. Thus, the output of the PLO error generated in the unstationary condition can be inhibited, and by outputting the latched PLO error, the load of the high- order device can be reduced.