Title:
デジタル・アナログ変換器における誤差低減改善方法及びこの方法が適用されるデジタル・アナログ変換器
Document Type and Number:
Japanese Patent JP2007534255
Kind Code:
A
Abstract:
In a method to improve error reduction in a digital-to-analog converter (DAC), comprising a mapping matrix block and a plurality of selectable source units which supply signals that in combination provide for analog output signals, mapping input signals, obtained from digital input signals to be converted into the analog output signals, are supplied to the mapping matrix block. In the mapping matrix block mapping output signals are generated in response to said mapping input signals and to mapping control signals derived from errors occurring in the plurality of selectable source units. At least one of the mapping input signals is applied for the substantially simultaneous generation of the mapping output signals for a number of source units.
Inventors:
Josef, Briar
Application Number:
JP2007509020A
Publication Date:
November 22, 2007
Filing Date:
April 11, 2005
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
H03M1/74; H03M1/06; H03M1/10
Attorney, Agent or Firm:
Kenji Yoshitake
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki
Hidetoshi Tachibana
Yasukazu Sato
Hiroshi Yoshimoto
Yasushi Kawasaki