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Patent Searching and Data


Title:
ERROR STATUS DISPLAY SYSTEM
Document Type and Number:
Japanese Patent JPS5717065
Kind Code:
A
Abstract:

PURPOSE: To increase the system safety, by having a status display even for a fault that arises from a faulty stoppage of a CPU or when no diagnosis program flows.

CONSTITUTION: A CPU1 progresses the process based on a firmware stored in a memory 2. This firmware is divided into some blocks of routine to be specified. Then the CPU1 gives a latch 3 to a routine number immediately before an execution of a certain routine and then carries out the routine after displaying the number through a display element 4. As a result, an error is detected to discontinue the execution of the firmware. Even in such case, the fault status can be understood since the routine number latched previously is displayed by an LED. Thus the process can be facilitated for a fault.


Inventors:
HIBI KENJI
Application Number:
JP9171280A
Publication Date:
January 28, 1982
Filing Date:
July 07, 1980
Export Citation:
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Assignee:
TOKYO SHIBAURA ELECTRIC CO
International Classes:
G06F11/32; G06F11/30; (IPC1-7): G06F11/30