Title:
半導体デバイスに蓄積される電荷の分布の抽出方法
Document Type and Number:
Japanese Patent JP5191382
Kind Code:
B2
Abstract:
The present invention discloses in a method to extract the spatial distribution of charge stored in a charge-trapping layer of a semiconductor device. The method comprises the steps of performing a first charge-pumping measurement on a device under test using a variation of the upper level of the pulse and performing a second charge-pumping measurement on this device using a variation of the lower level of the pulse. The data obtained is combined for extracting the spatial distribution. This is done by establishing a relation between a charge pumping current I cp and a calculated channel length L calc of the semiconductor device by reconstructing a spatial charge distribution from the charge pumping curves for multiple values of the charge pumping current I cp . From these multiple values of I cp the value for which the corresponding calculated channel length L calc is substantially equal to the effective channel length L eff of the semiconductor device, reconstructing the spatial charge distribution from the charge pumping curves using the value of l cp obtained in step e).
Inventors:
Arnault Furnemon
Application Number:
JP2008514128A
Publication Date:
May 08, 2013
Filing Date:
June 06, 2006
Export Citation:
Assignee:
IMEC
Katholieke Universiteit Leuven,K.U.Leuven R&D
Katholieke Universiteit Leuven,K.U.Leuven R&D
International Classes:
H01L21/336; G11C16/02; G11C16/04; H01L21/8247; H01L27/115; H01L29/788; H01L29/792
Domestic Patent References:
| JP2003303904A | ||||
| JP2006196650A |
Attorney, Agent or Firm:
Takuji Yamada
Mitsuo Tanaka
Kawabata Junichi
Mitsuo Tanaka
Kawabata Junichi