PURPOSE: To deposit gate oxides with different thickness on the wafer of an integrated circuit device while protecting the wafer against contamination with a photoresist resin during photoprocess.
CONSTITUTION: Under a state where the part for depositing gate oxides 23, 24 on the surface of a wafer 10 is covered entirely with an anti-oxidation film 13, e.g. silicon nitride, a field oxide 14 is provided through selective oxidation. The anti-oxidation film 13 is then removed from the part for depositing the gate oxide 24 by photoetching. In other words, a thick gate oxide 24 is deposited by thermal oxidation while covering the part for deposition the thin gate oxide 23 with the anti-oxidation film 13. Furthermore, under a state where the anti- oxidation film 13 is removed entirely from the surface of the wafer 10, the thin gate oxide 23 is deposited by thermal oxidation and then the thick gate oxide 24 is deposited thereon. Consequently, the gate oxides 23, 24 having different thickness are deposited for the transistors 41, 42 at a logic part 21 and a high breakdown strength part 22.
WO/2013/089556 | A METHOD OF FORMING A DEVICE WITH NANOSTRUCTURES |
JPS6231168 | SEPARATION GATE TYPE BIDIRECTIONAL POWER FET |
JPS58166769 | MANUFACTURE OF THIN FILM TRANSISTOR |
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