To reduce the processing system cost by providing an error inspecting function and masking a fault through hardware in duplex mode operation.
A data processing system 10 is equipped with two subprocessor systems 10A and 10B which have the same constitution and functions. This pair of the subprocessor systems 10A and 10B include a processor device (CPU) 12, a router 14, and an I/O packet interface 16 having a relative I/O device 17. Each of the pair of the CPUs 12 receive an error signal and returns an echo-back error signal to a couple of data communication elements. Then it is determined whether or not each CPU 12 continues to operate according to the error signal and echo-back error signal; and then one of the CPUs 12 continues to operate and the other CPU 12 finishes operating.
UIRIAMU EDOWAADO BEIKAA
UIRIAMU PATAASON BANTON
JIYON SHII KURAUSU
KENISU EICHI POOTAA
UIRIAMU JIYOERU WATOSON
RINDA ERIN ZARUZAARA