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Title:
FAILURE RECOVERY SYSTEM
Document Type and Number:
Japanese Patent JPS5755454
Kind Code:
A
Abstract:

PURPOSE: To prevent hung-up, by inhibiting the execution of initialization by the next hardware error, until the error information is read in with program, when a hardware error arises.

CONSTITUTION: A system controlling section 101, memory 102, and input and output controlling section 103 are coupled by a system bus 104. The system controlling section 101 is provided with a mechanism supporting the failure recovery function. This mechanism consists of mechanism for storing error information such as its cause and address if any hardware error in the system is detected, an initializing mechanism for the entire system, mechanism for writing in the error information stored with the program after initializing into an error logging memory area, and a mechanism for inhibiting the new initialization until the write-in is finished.


Inventors:
KAWASHITA TOMOYOSHI
Application Number:
JP12933080A
Publication Date:
April 02, 1982
Filing Date:
September 19, 1980
Export Citation:
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Assignee:
HITACHI LTD
International Classes:
G06F11/14; G06F11/07; G06F13/00; (IPC1-7): G06F11/00
Domestic Patent References:
JPS5496338A1979-07-30
JPS5532156A1980-03-06



 
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