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Patent Searching and Data


Title:
FAULTY AREA DETECTING SYSTEM FOR DIGITAL REPEATING TRANSMISSION LINE
Document Type and Number:
Japanese Patent JPS5635556
Kind Code:
A
Abstract:

PURPOSE: To ensure a detection for the regenerative repeater having a fault, by installing the logic operation means plus the pulse signal generating means which generates the different pulse signals to plural numbers of regenerative repeaters.

CONSTITUTION: The test pulse is transmitted to the repeater 15 and then to the amplifier 15-1 as well as to the input terminal (b) of the logic circuit 15-2 each. In case some fault arises to the repeater 15, the amplifier 15-1 does not generate the output synchronized with the test pulse supplied. And thus "1" is delivered to the output terminal (c) of the circuit 15-2. On the other hand, the 1/n2 pulse generating circuit 15-3 generates the pulse signal having the 1/n2 cycle compared with the test pulse cycle. Accordingly, the occurrence of fault can be detected for the repeater 15 by detecting the said pulse signal at the receiving terminal.


Inventors:
KUMAGAI MASAO
KAMIYAMADA KUNIYOSHI
SUMITANI HAJIME
Application Number:
JP11112979A
Publication Date:
April 08, 1981
Filing Date:
August 30, 1979
Export Citation:
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Assignee:
FUJITSU LTD
International Classes:
H04L5/14; H04B17/40; H04L25/02; H04L25/52; (IPC1-7): H04B3/46; H04L25/02; H04L25/66