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Patent Searching and Data


Title:
FAUST DETECTING METHOD FOR DISTRIBUTED COMPUTER SYSTEM
Document Type and Number:
Japanese Patent JPH0895931
Kind Code:
A
Abstract:

PURPOSE: To provide a fault detecting method with which fault resistance can be improved and the load on a network and a computer at normal time can be minimized by investigating whether each computer periodically receives a survival signal transmitted from the adjacent computer on a virtual ring or not, and judging the generation of any abnormality on a communication path to be used for transmitting the survival signal when no signal is received.

CONSTITUTION: Plural computers 101-104 or the like are arranged on a virtual ring 10 and each of computers 101-104 or the like periodically transmit the survival signal showing its own survival to the adjacent computer in the specified direction on the virtual ring 10. Besides, each of computers 101-104 or the like investigates whether the survival signal transmitted from the adjacent computer on the virtual ring 10 is periodically received or not, when no signal is received, it is judged that any abnormality is generated on the communication path to be used for transmitting the survival signal, and the position of that fault is specified. Then, each of computers 101-104 or the like reports fault information on the discovered fault to all communicatable communication equipment.


Inventors:
UEDA KENJI
Application Number:
JP23002294A
Publication Date:
April 12, 1996
Filing Date:
September 26, 1994
Export Citation:
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Assignee:
MITSUBISHI ELECTRIC CORP
International Classes:
G06F11/30; G06F13/00; G06F15/16; G06F15/177; (IPC1-7): G06F15/16; G06F11/30; G06F13/00
Attorney, Agent or Firm:
Hiroaki Tazawa (2 outside)