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Patent Searching and Data


Title:
FEEDER FOR COMPUTER
Document Type and Number:
Japanese Patent JPH08205391
Kind Code:
A
Abstract:

PURPOSE: To surely perform emergency saving operation for preserving its memorized content and to reset operation to their specified initial conditions, when the AC input voltage of a stabilized power supply means drops abnormally.

CONSTITUTION: AC input voltage Vi is monitored by an malfunction detecting means 30, and a malfunction signal Sd is generated when it loweres abnormally. In accordance with this, a first time interval T1 is set by an emergency saving means 40, and the voltage value of the output voltage Vo of a stabilized power supply means 10 is lowered from V1 to V2 only during that interval. In accordance with this lowering, an output voltage monitoring means 42 interrupts a computer 2 for emergency saving. Besides, a second time interval longer than the first time interval T1 is set by a resetting means 50, and after the passage of that time supply of the output voltage Vo to the computer 2 is interrupted by the switching means 51. In response to this, an output voltage monitoring means 52 orders the computer 2 to perform reset operation.


Inventors:
TAKEUCHI TORU
Application Number:
JP857595A
Publication Date:
August 09, 1996
Filing Date:
January 24, 1995
Export Citation:
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Assignee:
FUJI ELECTRIC CO LTD
International Classes:
G06F1/28; G06F1/30; H02H7/20; H02J1/00; (IPC1-7): H02H7/20; G06F1/28; G06F1/30; H02J1/00
Attorney, Agent or Firm:
Iwao Yamaguchi