Title:
電界効果トランジスタおよびその製造方法
Document Type and Number:
Japanese Patent JP4904696
Kind Code:
B2
Abstract:
To realize a transistor with a channel and a gate, both being formed with nanotubes, by joining the nanotubes in the form of SP3 bonding, a substrate, on which a pair of source and drain electrodes 27, and a gate terminal 28 are formed, is prepared (Fig. (a)), and then a catalytic layer 20 is formed at the one of the source and drain electrodes 27 (Fig. (b)). A first CNT 23 is formed (Fig. (d)) between the pair of source and drain electrodes 27 by growing the CNT (Fig. (c)) in which the catalytic layer 20 is a core. A second CNT 24 is picked by a holding means 25, and after a cap is eliminated and an opening portion is cleaned using the electron beam as needed, the opening portion is contacted to the side of the first CNT 23, thereby joining the two CNT (fig. (e)). The other end portion of the second CNT 24 is positioned at the gate terminal 28 (Fig. (f)). End portions of the CNT are fixed on the electrodes and the terminal by selectively irradiating metallic ion.
Inventors:
Takazumi Kawai
Yoshiyuki Miyamoto
Yoshiyuki Miyamoto
Application Number:
JP2005038910A
Publication Date:
March 28, 2012
Filing Date:
February 16, 2005
Export Citation:
Assignee:
NEC
International Classes:
H01L29/80; B82B1/00; B82B3/00; B82Y10/00; B82Y30/00; B82Y40/00; C01B31/02; H01L29/06; H01L29/786
Domestic Patent References:
| JP2003109974A | ||||
| JP2004503097A |
Attorney, Agent or Firm:
Yusuke Omi