Title:
FILE MANAGEMENT/TRANSFER SYSTEM FOR MICROPROCESSOR EXCHANGE SYSTEM
Document Type and Number:
Japanese Patent JP2988096
Kind Code:
B2
Abstract:
PURPOSE: To shorten time required for the file transfer and the half system operation period of a processor by transferring files using a multiple address communication function.
CONSTITUTION: Based on the file load direction from a maintenance person, a maintenance operation management processor(OMP)11 directs to start the load to a file update processor(FUP)12 being each processor for updating files and separately informs file ID(FID) list showing the file list necessary for each processor. All the FID lists of the objective processor are sorted to eliminate the overlapping of the FID and the update file corresponding to the FID is successively transmitted by multiple address communication. The FUP processor 12 collates the receiving file ID with the received FID list, and writes them in the stand-by (SBY) memory when they coincide or cancels them when they are not coincident. Similarly, all the lists are cancelled in the processor 13 not for FUP.
Inventors:
MYAKITA HIROSHI
SUZUKI TAKASHI
SUZUKI TAKASHI
Application Number:
JP35391491A
Publication Date:
December 06, 1999
Filing Date:
December 19, 1991
Export Citation:
Assignee:
KEI DEI DEI KK
NIPPON DENKI KK
NIPPON DENKI KK
International Classes:
G06F9/445; H04M3/00; H04Q3/545; (IPC1-7): H04M3/00; H04Q3/545
Domestic Patent References:
| JP2152392A | ||||
| JP6253097A |
Attorney, Agent or Firm:
Keiichi Yamamoto