Title:
バスサイクル毎に選択可能な数のデータワードの読み出し及び/又は書き込みを行うことができるファーストイン・ファーストアウトバッファ
Document Type and Number:
Japanese Patent JP2004521426
Kind Code:
A
Abstract:
A first in, first out (FIFO) circular buffer enables high speed streaming data transfer between integrated circuit devices by performing more than one data element transfer unidirectionally by having a plurality of ports to address a memory array. In addition, the multiple transfers are performed during one bus cycle and the number of transfers may be selectable. FIFO control circuitry limits the number of data elements transferred in response to the state of the memory array including almost empty or almost full.
Inventors:
Eman Gregory E
Application Number:
JP2003502670A
Publication Date:
July 15, 2004
Filing Date:
June 03, 2002
Export Citation:
Assignee:
Koninklijke Philips Electronics N.V.
International Classes:
G06F13/38; G06F3/00; G06F5/06; G06F5/10; G06F13/00; H04L13/08; (IPC1-7): G06F13/38; G06F5/06; H04L13/08
Attorney, Agent or Firm:
Susumu Tsugaru
Akihiko Miyazaki
Hiroyoshi Aoki
Akihiko Miyazaki
Hiroyoshi Aoki