To bury a metallic wiring layer also in a contact hole of a large aspect ratio readily by forming a barrier metal layer all over an insulation film wherein a contact hole is incorporated and forming a high density plasma CVD metallic wiring layer on the barrier metal layer.
After a photosensitive film PR is applied all over a second insulation film 29, the photosensitive film PR is patterned to expose the second insulation film 29 of a contact hole formation region. The second insulation film 29 and a first insulation film 28 are removed by etching by using the patterned photosensitive film PR as a mask and a contact hole 30 which exposes one surface of a semiconductor substrate wherein a source/drain region 26 is formed. A barrier metal layer 31 is formed in a surface of the second insulation film 29 including a surface of a semiconductor substrate inside the contact hole 30. A metallic wiring layer 32 is formed to completely fill up the contact hole 30 by high density plasma vapor growth method all over the barrier metal layer 31.
WO/2008/018478 | JUNCTION STRUCTURE OF DEVICE |
JP2515055 | SEMICONDUCTOR DEVICE |
JP2022517537 | Integrated epitaxial metal electrode |
PARK NAE HAK
Next Patent: DICHLOROSILANE BASE TUNGSTEN SILICIDE CHEMICAL VAPOR DEPOSITION PROCESS AND SYSTEM