Login| Sign Up| Help| Contact|

Patent Searching and Data


Title:
FORMATION OF MULTILAYER INTERCONNECTION
Document Type and Number:
Japanese Patent JPS635545
Kind Code:
A
Abstract:

PURPOSE: To enable a through-hole etching process to be accomplished with stability by a method wherein a first wiring layer connected to a P-well is connected to a first wiring layer connected to an N-type substrate.

CONSTITUTION: A first Al wiring layer 2 is formed to be connected to a P-type substrate or P-well 100. The first Al wiring layer 2 is next connected at least to an N-type substrate 101 or N-well region before it is subjected to patterning, whereby an opening 4 is created to reach the first Al wiring layer 2 through an insulating film 3 formed on the first Al wiring layer 2. In a process to follow, the portion, connecting to the N-type substrate 101 or N-well region, is removed from the first Al wiring layer 2. In this way, the first Al wiring layer 2 is protected from irregularities that may occur during the process of creating the opening 4. Accordingly, connection is establish with high stability between upper and lower layers (Al layers or the like) even when wet etching is applied for the opening of a through-hole.


Inventors:
SHINGUU MASATAKA
Application Number:
JP14816786A
Publication Date:
January 11, 1988
Filing Date:
June 26, 1986
Export Citation:
Click for automatic bibliography generation   Help
Assignee:
SONY CORP
International Classes:
H01L21/3213; (IPC1-7): H01L21/88
Attorney, Agent or Firm:
Toru Takatsuki