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Patent Searching and Data


Title:
FRAME SYNCHRONISM PROTECTIVE CIRCUIT
Document Type and Number:
Japanese Patent JPH0653953
Kind Code:
A
Abstract:

PURPOSE: To prevent a circuit function from stopping even when a correlative pattern is detected at the same position with a frame synchronous pattern before changeover immediately after the changeover of input data.

CONSTITUTION: A coincidence detector 4 compares a pulse Pd for which the inputted frame synchronous pattern is detected by the coincidence of entire bits with a synchronous pulse ps generated by a frame counter 6 and transmits the pulse K1 when timings are coincident. A noncoincidence detector 5 compares the pulse Pe for which the frame synchronous pattern is detected by the coincidence of the prescribed bits with the synchronous pulse Ps and transmits the pulse K2 when the timings are not coincident. A coincidence counter 7 and a noncoincidence counter 8 count the pulses K1 and K2 up to a prescribed number. A reset signal discrimination device 13 receives a signal C3 for indicating a discrimination period from a fixed counter 12, detects the presence of a reset signal R2 within the discrimination period, transmits an abnormality detection signal C4 when the reset signal R2 is not present and resets the frame counter 6 by forcedly defining an out-of-synchronism state.


Inventors:
OYAMA TAKEKATSU
Application Number:
JP20638192A
Publication Date:
February 25, 1994
Filing Date:
August 03, 1992
Export Citation:
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Assignee:
NEC CORP
International Classes:
H04L7/08; (IPC1-7): H04L7/08
Attorney, Agent or Firm:
Naoki Kyomoto (2 outside)