Title:
FRAME SYNCHRONIZING DEVICE
Document Type and Number:
Japanese Patent JP3196989
Kind Code:
B2
Abstract:
PURPOSE: To cope with the acceleration of a transmission speed and to eliminate the need of equalizing the lengths of wires and adjusting data phases by detecting frame synchronizing patterns from stored information data, obtaining a phase difference with transmitted frame synchronizing signals and synchronizing frames.
CONSTITUTION: A synchronizing pattern detection circuit 1 detects the frame synchronizing patterns from the information data stored in the shift register 4 of a storage means. The phase difference of the frame synchronizing pattern and transmitted synchronizing signals SYNC is calculated in a phase difference calculation circuit 2 and the head position of data inside the register 4 is decided by a selector 3. By this constitution, the need of equalizing the length of the wires and adjusting the data phase is eliminated and this frame synchronizing device capable of coping with the acceleration of the transmission speed is obtained.
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Inventors:
Masahiko Motoyama
Application Number:
JP22292893A
Publication Date:
August 06, 2001
Filing Date:
September 08, 1993
Export Citation:
Assignee:
Toshiba Corporation
International Classes:
H04L7/08; H04L12/28; (IPC1-7): H04L7/08
Domestic Patent References:
| JP3244235A | ||||
| JP5206973A | ||||
| JP622731A | ||||
| JP6261097A |
Attorney, Agent or Firm:
Hideaki Togawa